Formal Verification Conference
After the overwhelming success of the Formal Verification Conference for the past two years, TVS is pleased to announce the third Formal Verification Conference where Verification Engineers and Managers can once again join EDA vendors to discuss the issues of the day.
- Users will present their current experiences of using formal verification and their challenges in further deployment
- EDA vendors can present their solutions and roadmaps
- Discussions can be set up to encourage the exchange of use models and flows to improve the industrial application of formal both in the near and long term
We hope to attract 60/80 senior engineers and decision makers to the conference.
|08:45||Arrival, Registration and Refreshments|
|09:25||Welcome – Mike Bartley, Test and Verification Solutions Ltd|
|09.30||Keynote: Prof. Ashish Darbari, Imagination Technologies Ltd. The Ten Myths About Formal|
|10.10||Mark Handover, Mentor Graphics Back to Basics: Doing Formal the Right Way|
|10.40||Alex Orr, Broadcom My first 100 days in formal-land|
|11:10||Refreshments and Networking|
|11.40||John Colley, University of Southampton Formal, Model-based Development and Verification of Hardware, Software and Cyber-Physical Systems|
|12.50||Lunch and Networking|
|13.50||Laurent Arditi, ARM Formal Weapons for Microprocessor Verification|
|14.20||David Kelf, OneSpin Solutions Extending the Formal-based Ecosystem – Refreshing the parts other formal tools can’t reach|
|14.50||Refreshments and Networking|
|15.10||Iain Singleton, Imagination Technologies It’s all in the Model: Verifying Complex Arbitration Schemes using Formal|
|15.50||Doug Fisher, Synopsys Alternative formal techniques to increase verification productivity|
TVS reserves the right to withdraw registration at its discretion.
Registration details will be passed to sponsors, if you wish to opt out please contact us (email@example.com)