Introduction to JTAG – Concepts, Tools & Design for Test (DFT)
These practical, technical workshops are intended for all engineers involved in the design, development, test or manufacturing of electronic systems, addressing the challenges emerging from today's increasingly complex and dense silicon packaging.
The full-day sessions are designed to provide a practical hands-on introduction to the concepts underlying JTAG boundary scan testing, as well as a demonstration of how the easy-to-use XJTAG tools harness the power of this technology. The workshop is held by experienced application engineers, no prior knowledge of JTAG is required.
Learn the basics of boundary scan and how you can use it to improve test coverage and accelerate fault diagnosis on all PCBs, but particularly those that have BGAs and fine-pitch devices. The workshop outlines the following:
- What JTAG is and how it is used
- How advanced tools can simplify the development of complete tests, using real boards
- How to enable JTAG testing and extend it to non-JTAG devices
(such as ADCs, DACs, Flash and DDR)
- How to diagnose and debug faults on failed boards, even under fine-pitch components such as FPGAs or BGAs