Performance Testing and Analysis

Tessolve Semiconductor Ltd

Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die.

<h2>Performance Testing and Analysis</h2><p>Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die.</p><h2>Agenda (BST)</h2><p>12:00    Welcome and Introduction – <a href="https://www.tessolve.com/mike-bartley/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Mike Bartley</a>, Tessolve</p><p>12:00  Nick Heaton, Cadence Design Systems - <a href="https://www.tessolve.com/soc-verification-in-a-multi-chip-multi-die-world/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">SoC Verification in a Multi-chip, Multi-die world</a></p><p>12:30    David Kelf,  Breker Verification Systems - <a href="https://www.tessolve.com/automated-soc-performance-and-power-profiling-pre-and-post-fabrication/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Automated SoC Performance and Power Profiling Pre- and Post-Fabrication</a></p><p>13:00   Close</p><h2>Additional Information</h2><p>For additional information please visit the Tessolve <a href="https://www.tessolve.com/dvclub-europe-april-2023-performance-testing-and-analysis/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">DVClub Europe</a> page for this event. </p><h2>Sponsors</h2><p>DVClub Europe is made possible through the generous support of our sponsors: <a href="https://www.agnisys.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Agnisys Inc</a> , <a href="https://www.arm.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">ARM</a>, <a href="http://www.brekersystems.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Breker Verification Systems</a>, <a href="https://www.cadence.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Cadence</a>, <a href="https://www.imperas.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Imperas Software</a>, <a href="https://eda.sw.siemens.com/en-US/ic/questa/onespin-formal-verification/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">OneSpin Solutions</a>, <a href="https://www.mentor.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Siemens</a>, <a href="http://www.st.com/content/st_com/en.html" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">ST Microelectronics</a> and <a href="https://www.synopsys.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Synopsys.</a></p><p><em>Tessolve reserves the right to cancel registration at its discretion.</em></p>

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Performance Testing and Analysis

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Performance Testing and Analysis

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